TLE2072IDR

Product Summary

The TLE2072IDR series of JFET-input operational amplifiers more than double the bandwidth and triple the slew rate of the TL07x and TL08x families of BiFET operational amplifiers. Texas Instruments Excalibur process yields a typical noise floor of 11.6 nV/√Hz, 17-nV/√Hz ensured maximum, offering immediate improvement in noise-sensitive circuits designed using the TL07x. The TLE2072IDR also has wider supply voltage rails, increasing the dynamic signal range for BiFET circuits to ±19 V. On-chip zener trimming of offset voltage yields precision grades for greater accuracy in dc-coupled applications. The TLE2072IDR are pin-compatible with lower performance BiFET operational amplifiers for ease in improving performance in existing designs. The TLE2072IDR family of BiFET amplifiers are Texas Instruments highest performance BiFETs, with tighter input offset voltage and ensured maximum noise specifications. Designers requiring less stringent specifications but seeking the improved ac characteristics of the TLE2072IDR should consider the TLE208x operational amplifier family.

Parametrics

TLE2072IDR absolute maximum ratings: (1)Supply voltage, VCC+: 19 V; (2)Supply voltage, VCC- : -19 V; (3)Differential input voltage range, VID: VCC+ to VCC-; (4)Input voltage range, VI (any input): VCC+ to VCC-; (5)Input current, II: ±1 mA; (6)Output current, IO: ±80 mA; (7)Total current into VCC+: 160 mA; (8)Total current out of VCC: 160 mA; (9)Duration of short-circuit current at (or below) 25℃: unlimited; (10)Storage temperature range: -65℃ to 150℃; (11)Case temperature for 60 seconds: FK package: 260℃; (12)Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: DW or N package: 260℃; (13)Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J, JG, U, or W package: 300℃.

Features

TLE2072IDR features: (1)Direct Upgrades to TL05x, TL07x, and TL08x BiFET Operational Amplifiers; (2)Greater Than 2× Bandwidth (10 MHz) and 3× Slew Rate (45 V/μs) Than TL07x; (3)Ensured Maximum Noise Floor 17 nV/√Hz; (4)On-Chip Offset Voltage Trimming for Improved DC Performance; (5)Wider Supply Rails Increase Dynamic Signal Range to ±19 V.

Diagrams